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Microfabrication method of flexible electrically conductive layers

A novel technique that allows the production of highly conductive micro-wrinkled layers on flexible substrates, that can be repeatedly deformed without loss of their electrical properties.

This process combines high precision and ease of fabrication using widely used, industry-friendly materials. The patterned conductive layers allow electrical currents to be handled effectively, enabling flexible circuits and conduits.

The flexible material is transferable and biocompatible, and can be used without damage, thus offering high performance to several applications. This process is compatible with conventional (industry-standard) semiconductor processing and microfabrication.


  • Optoelectronics
  • Biomedical

Development Status

  • Prototype demonstration results available

IP Status

  • PCT application filed

Commercial Offering

  • Licensing and/or collaborative research


Fabrication of microscale wrinkled conductive layers is a new approach to produce flexible and conductive substrates at scale. This combines the advantages of being cost-effective, yielding substrates with conformable design features and ease of integration with electronic components, that can be used in a wide range of practical applications.

The technology developed offers the opportunity to be implemented in industries where there is a need for products with components suited to withstand cracking, with an increased bending tolerance, whilst remaining highly conductive. The flexible substrates are also biocompatible, offering opportunities in medical and wearable electronics technologies.

Technology Overview

University of Edinburgh and Heriot-Watt researchers have developed an effective approach to generate micro-scale wrinkled layers, with highly flexible and conductive characteristics. This is a novel bottom-up approach to microfabrication whereby devices are manufactured on a silicon (Si) carrier wafer, from which the flexible device is later peeled off.

The process involves standard semiconductor processing and manufacturing steps, including surface (plasma) treatments, material deposition, photolithography, and etching. This patent-pending approach enables high manufacturing precision, uniformity, and mass wafer treatment for high manufacturing yield of different and multiple devices simultaneously.


  • Readily integratable with existing electronics manufacturing technologies.
  • Stability to iterative compressive deformation, delamination, extreme bending (≤1mm radius) and 180° folding of the tracks.
  • Highly conductive metal tracks with flexible and conformable design.
  • Scalable manufacturing process, therefore, cost-effective and potentially disposable.
  • Biocompatible flexible substrates, for wearable and medical electronics applications


International patent application: WO2021171037A1

This technology was developed between the University of Edinburgh and Heriot-Watt University.

Please note: the header image is purely illustrative. Only use images with permission.

Quote: TEC1104167

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Dr Nikos Christogiannis

Technology Transfer Executive

School of Engineering
School of Informatics
School of Geosciences
School of Mathematics